1. Field of the Invention
The present invention relates to a technique of manufacturing semiconductor devices. In particular, the present invention relates to measurement coordinate setting system and method.
2. Description of the Related Art
In a process of manufacturing semiconductor devices, dimensions of patterns formed on a surface of a wafer or wafers must be uniform in the surface plane of the wafer or between the wafers. For this reason, wafers are sampled during the manufacture process to inspect whether or not the dimensions of the formed patterns are uniform. A distribution of the dimensions of the patterns formed on the wafer surface often depends on the characteristic of the manufacturing device such as a lithography device, an etching device, etc. Therefore, the distribution of the pattern dimension in the surface plane often shows a specific scheme reflecting the device characteristic. Thus, in the inspection, it is important to determine a dimensional distribution scheme to improve the manufacturing process. On the other hand, it is preferable that the number of necessary samplings for inspection is as less as possible to reduce the inspection cost. Thus, it is desirable to provide a method of extracting the least number of samples with which the dimensional distribution mode may be determined. However, many of the conventional sampling methods employ complicated algorithms (e.g., see B. Moon, J. McNames, B. Whitefield, P. Rudolph, J. Zola, “Wafer Sampling by Regression for Systematic wafer Variation Detection”, (US), Proceedings of SPIE 5755, 2005, P 212-221). Due to such complicated algorithms being used, it is difficult to introduce the conventional sampling methods into the process of manufacturing semiconductor devices.
The present invention provides measurement coordinate setting system and method, which can reduce the number of samples for inspecting dimensional variations of products.